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  1. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_1.pt +3 -0
  2. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_10.pt +3 -0
  3. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_11.pt +3 -0
  4. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_12.pt +3 -0
  5. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_13.pt +3 -0
  6. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_14.pt +3 -0
  7. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_15.pt +3 -0
  8. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_16.pt +3 -0
  9. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_17.pt +3 -0
  10. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_18.pt +3 -0
  11. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_19.pt +3 -0
  12. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_2.pt +3 -0
  13. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_20.pt +3 -0
  14. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_3.pt +3 -0
  15. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_4.pt +3 -0
  16. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_5.pt +3 -0
  17. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_6.pt +3 -0
  18. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_7.pt +3 -0
  19. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_8.pt +3 -0
  20. cap_ViT-M-32_s12800000_datacomp_1b_globalbs8192_lr0.003_b1_0.9_b2_0.95_sched_cosine_warmup4000_gpus64/epoch_9.pt +3 -0
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