Humphery7/build_your_circuit · Datasets at Hugging Face

Prompt stringlengths 61 272	NGSPICE_Netlist stringlengths 24 960
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 6.723-07 <NL> r1 out 0 895.63 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with r1=9991 ohms and r2=4533 ohms. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> xop 0 fb out opamp <NL> r1 fb 0 9991 <NL> r2 out fb 4533 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>
<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter with r=20000.0 ohms, c=1e-12f, cutoff frequency approximately 7957747.15hz. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> create a voltage divider circuit using r1=61938.17 and r2=91719.67. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 12475.45 <NL> r2 2 0 37113.93 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please help me generate a voltage divider circuit with 35124.64 resistor and 54800.91 resistor. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 35124.64 <NL> r2 2 0 54800.91 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 2692.68 <NL> c1 out 0 3.139-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 5.33-07 <NL> r1 out 0 9982.57 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 dc 9 <NL> r1 in out 9043 <NL> r2 out 0 2466 <NL> .op <NL> .print dc v(out) <NL> .end <END_NETLIST>
<USER_REQUEST> create a 4-stage voltage divider ladder circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> xop 0 fb out opamp <NL> r1 fb 0 7702 <NL> r2 out fb 9318 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=10000.0 ohms, r2=100 ohms, and input voltage 12v. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> generate an ngspice netlist for a current divider with a 7.752 current source. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 0.719 <NL> r1 1 0 15803.65 <NL> r2 1 0 69633.64 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 66131.44 <NL> r2 2 0 74200.47 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a voltage divider circuit using r1=93518.71 and r2=34393.73. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 93518.71 <NL> r2 2 0 34393.73 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 2. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 0.0001 <NL> r1 out 0 1000000.0 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 5836 <NL> c1 out 0 5.00014-07 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 7466.57 <NL> c1 2 0 3.459-07 <NL> r2 2 3 1864.23 <NL> c2 3 0 5.448-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> help me with a spice netlist for a resistor ladder with 4 stages. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please help me generate a voltage divider circuit with 4695.35 resistor and 74179.29 resistor. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 4695.35 <NL> r2 2 0 74179.29 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a high pass filter with r=3151.9 ohms and c=2.343e-07 f. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.582-07 <NL> r1 out 0 5192.93 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=50000.0 ohms, r2=100 ohms, and input voltage 15v. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 75304.79 <NL> r2 2 0 47977.16 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=10436 ohms, c=8.85e-07f. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 8.85389-07 <NL> r1 out 0 10436 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a low pass filter circuit with a resistor of 6844.81 and a capacitor of 8.304e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 8679.96 <NL> c1 out 0 6.301-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 1000.0 <NL> c1 out 0 1-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 87175.55 <NL> r2 2 0 52297.01 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 86031.49 <NL> r2 2 0 27167.07 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a voltage divider circuit using r1=20009.67 and r2=25568.39. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 20009.67 <NL> r2 2 0 25568.39 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=13546 ohms, c=2.22e-07f. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 2.21599-07 <NL> r1 out 0 13546 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=40326 ohms, c=7.09e-07f. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.09477-07 <NL> r1 out 0 40326 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a voltage divider circuit using r1=43252.55 and r2=66243.5. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 12789.17 <NL> r2 2 0 31437.06 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with r1=1406 ohms and r2=4936 ohms. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> xop 0 fb out opamp <NL> r1 fb 0 1406 <NL> r2 out fb 4936 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 1-10 <NL> r1 out 0 100000.0 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> help me with a spice netlist for a resistor ladder with 2 stages. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> opamp amplifier with gain 12. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> xop in fb out opamp <NL> rin fb 0 1000.0 <NL> rf out fb 11000.0 <NL> vpos 15 0 dc 15 <NL> vneg 0 -15 dc -15 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 8.534-07 <NL> r1 out 0 2298.17 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 40492.84 <NL> r2 2 0 43486.25 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 60812.08 <NL> r2 2 0 629.78 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please help me generate a voltage divider circuit with 13895.17 resistor and 71280.13 resistor. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 68556.58 <NL> r2 2 0 29323.19 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=200 ohms, r2=10000.0 ohms, and input voltage 10v. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 8671.33 <NL> c1 2 0 6.47-07 <NL> r2 2 3 2449.0 <NL> c2 3 0 9.142-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> run an .ac analysis and list v(node) magnitude and angle for several frequencies. <END_USER_REQUEST>	<NETLIST> vac 9 0 ac 10 <NL> r1 1 x2 22000 <NL> r2 x2 8 1000 <NL> r3 8 0 3300 <NL> vsense 5 6 0 <NL> hdep x2 2 vsense 0.1 <NL> .ac lin 11 10 1000.0 <NL> .end <END_NETLIST>
<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter with r=1500.0 ohms, c=1e-12f, cutoff frequency approximately 106103295.39hz. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 7. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> generate a spice netlist for an active high-pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 sin(0 1 1000) ; input sinusoidal waveform <NL> .model opamp opamp (gbw=1e+06) <NL> r1 in n1 10000 <NL> c1 n1 n2 1e-08 <NL> r2 n2 n3 10000 <NL> c2 n3 out 1e-08 <NL> r3 n3 n4 10000 <NL> c3 n4 0 1e-07 <NL> r4 n4 n5 10000 <NL> c4 n5 0 1e-06 <NL> vcc 5 0 dc 15 ; positive supply voltage <NL> vee 0 6 dc -15 ; negative supply voltage <NL> vout out 0 <NL> .ac dec 10 1 1e+06 ; perform an ac analysis from 1 hz to 1 mhz <NL> .print ac v(out) ; print output voltage <NL> .plot ac v(out) ; plot output voltage <NL> .probe <NL> .end <END_NETLIST>
<USER_REQUEST> generate an ngspice netlist for a current divider with a 2.7 current source. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 8.102 <NL> r1 1 0 97764.02 <NL> r2 1 0 61677.55 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a voltage divider with resistors of 26546.88 ohms and 75729.66 ohms. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 26546.88 <NL> r2 2 0 75729.66 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 4. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> create a high pass filter circuit with a resistor of 6224.45 and a capacitor of 9.421e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.267-07 <NL> r1 out 0 6077.56 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a voltage divider circuit using r1=96774.63 and r2=3266.59. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 96774.63 <NL> r2 2 0 3266.59 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 3141.09 <NL> c1 out 0 8.493-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a spice netlist for a current divider with a 1.716 current source and resistors r1=25297.5 and r2=21156.4. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 6.047 <NL> r1 1 0 41341.24 <NL> r2 1 0 86213.05 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> run an .ac analysis and list v(node) magnitude and angle for several frequencies. <END_USER_REQUEST>	<NETLIST> vac 1 0 ac 0.5 <NL> r1 n2 5 47000 <NL> r2 5 8 680 <NL> r3 8 0 47 <NL> .ac oct 5 10 100000.0 <NL> .end <END_NETLIST>
<USER_REQUEST> create a 2-stage voltage divider ladder circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a two-stage low pass filter using r1=3952.36, c1=5.138e-07, r2=6740.25, and c2=8.41e-08. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 2303.21 <NL> c1 2 0 2.621-07 <NL> r2 2 3 8255.57 <NL> c2 3 0 5.18-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> perform a linear dc operating point/sweep analysis and compute node voltages and branch currents. <END_USER_REQUEST>	<NETLIST> vdc 3 0 0.5 <NL> r1 1 4 680 <NL> c1 4 3 4.7-08 <NL> r2 4 0 220 <NL> .dc vdc 0 12 0.2 <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 81516.7 <NL> r2 2 0 24160.53 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please create a current divider circuit. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 0.496 <NL> r1 1 0 46110.64 <NL> r2 1 0 41935.86 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=6181 ohms, r2=7209 ohms, and input voltage 18v. <END_USER_REQUEST>	<NETLIST> v1 in 0 dc 18 <NL> r1 in out 6181 <NL> r2 out 0 7209 <NL> .op <NL> .print dc v(out) <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 2.252-07 <NL> r1 out 0 7893.82 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> help me with a spice netlist for a resistor ladder with 5 stages. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> r9 5 6 1000 <NL> r10 6 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> print v(6) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a low pass filter circuit with a resistor of 6137.45 and a capacitor of 1.049e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 8698.25 <NL> c1 out 0 5.29-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a high pass filter circuit with a resistor of 272.04 and a capacitor of 8.324e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.276-07 <NL> r1 out 0 2034.12 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a 4-stage voltage divider ladder circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a high pass filter with r=7612.09 ohms and c=4.339e-07 f. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.339-07 <NL> r1 out 0 7612.09 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate an ngspice netlist for an rc low pass filter using r=4405.25 and c=2.779e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 5337.07 <NL> c1 out 0 3.554-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 6.478-07 <NL> r1 out 0 6044.75 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 3.29-07 <NL> r1 out 0 9149.81 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please help me generate a voltage divider circuit with 46920.87 resistor and 8435.45 resistor. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 46920.87 <NL> r2 2 0 8435.45 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 6.519-07 <NL> r1 out 0 1329.42 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.72-07 <NL> r1 out 0 4829.97 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter with r=20000.0 ohms, c=1e-07f, cutoff frequency approximately 79.58hz. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 10367.65 <NL> r2 2 0 97228.73 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a low pass filter circuit with a resistor of 3065.89 and a capacitor of 1.327e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 3065.89 <NL> c1 out 0 1.327-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=20000.0 ohms, c=5e-06f, cutoff frequency around 1.59hz. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 7362.42 <NL> c1 out 0 1.666-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 6392.32 <NL> c1 out 0 5.243-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 3.231-07 <NL> r1 out 0 1565.61 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 8607.41 <NL> c1 2 0 9.295-07 <NL> r2 2 3 4007.5 <NL> c2 3 0 3.951-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a high pass filter circuit with a resistor of 5558.69 and a capacitor of 4.294e-07. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.294-07 <NL> r1 out 0 5558.69 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 6506.21 <NL> c1 2 0 1.615-07 <NL> r2 2 3 4831.41 <NL> c2 3 0 3.003-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a netlist for a 4-stage resistor ladder circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 5.509-07 <NL> r1 out 0 217.55 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a 5-stage voltage divider ladder circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> compute the dc transfer from input to output node and list resistor currents. <END_USER_REQUEST>	<NETLIST> vdc 6 0 0.5 <NL> r1 5 x1 470 <NL> l1 x1 5 0.022 <NL> .op <NL> .end <END_NETLIST>
<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=48405 ohms, c=4.73e-07f. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.72951-07 <NL> r1 out 0 48405 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> create a 5-stage voltage divider ladder circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 6925.05 <NL> c1 out 0 6.156-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> help me with a spice netlist for a resistor ladder with 2 stages. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> r9 5 6 1000 <NL> r10 6 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> print v(6) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate an ngspice netlist for a current divider with a 2.537 current source. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 5.634 <NL> r1 1 0 87876.36 <NL> r2 1 0 4887.27 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 79118.47 <NL> r2 2 0 38450.93 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> i need a two-stage low pass filter circuit with these values: r1=9838.38, c1=3.36e-08, r2=4024.43, c2=4.715e-07. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 7718.17 <NL> c1 2 0 1.97-08 <NL> r2 2 3 5847.98 <NL> c2 3 0 8.904-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> i need a two-stage low pass filter circuit with these values: r1=3930.1, c1=2.697e-07, r2=7069.52, c2=5.984e-07. <END_USER_REQUEST>	<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 5657.47 <NL> c1 2 0 5.383-07 <NL> r2 2 3 3510.28 <NL> c2 3 0 3.427-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 11. <END_USER_REQUEST>	<NETLIST> <END_NETLIST>
<USER_REQUEST> please create a current divider circuit. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 7.58 <NL> r1 1 0 33974.22 <NL> r2 1 0 84776.84 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 25906.09 <NL> r2 2 0 38634.55 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate an ngspice netlist for a current divider with a 2.77 current source. <END_USER_REQUEST>	<NETLIST> i1 0 1 dc 8.778 <NL> r1 1 0 84697.61 <NL> r2 1 0 2090.53 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>	<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 7877.15 <NL> r2 2 0 74380.22 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>
<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>	<NETLIST> v1 in 0 ac 1 <NL> r1 in out 6117.41 <NL> c1 out 0 9.578-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 6.723-07 <NL> r1 out 0 895.63 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with r1=9991 ohms and r2=4533 ohms. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> xop 0 fb out opamp <NL> r1 fb 0 9991 <NL> r2 out fb 4533 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>

<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter with r=20000.0 ohms, c=1e-12f, cutoff frequency approximately 7957747.15hz. <END_USER_REQUEST>

<USER_REQUEST> create a voltage divider circuit using r1=61938.17 and r2=91719.67. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 12475.45 <NL> r2 2 0 37113.93 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please help me generate a voltage divider circuit with 35124.64 resistor and 54800.91 resistor. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 35124.64 <NL> r2 2 0 54800.91 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 2692.68 <NL> c1 out 0 3.139-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 5.33-07 <NL> r1 out 0 9982.57 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 dc 9 <NL> r1 in out 9043 <NL> r2 out 0 2466 <NL> .op <NL> .print dc v(out) <NL> .end <END_NETLIST>

<USER_REQUEST> create a 4-stage voltage divider ladder circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> xop 0 fb out opamp <NL> r1 fb 0 7702 <NL> r2 out fb 9318 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=10000.0 ohms, r2=100 ohms, and input voltage 12v. <END_USER_REQUEST>

<USER_REQUEST> generate an ngspice netlist for a current divider with a 7.752 current source. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 0.719 <NL> r1 1 0 15803.65 <NL> r2 1 0 69633.64 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 66131.44 <NL> r2 2 0 74200.47 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a voltage divider circuit using r1=93518.71 and r2=34393.73. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 93518.71 <NL> r2 2 0 34393.73 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 2. <END_USER_REQUEST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 0.0001 <NL> r1 out 0 1000000.0 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 5836 <NL> c1 out 0 5.00014-07 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 7466.57 <NL> c1 2 0 3.459-07 <NL> r2 2 3 1864.23 <NL> c2 3 0 5.448-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> help me with a spice netlist for a resistor ladder with 4 stages. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please help me generate a voltage divider circuit with 4695.35 resistor and 74179.29 resistor. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 4695.35 <NL> r2 2 0 74179.29 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a high pass filter with r=3151.9 ohms and c=2.343e-07 f. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.582-07 <NL> r1 out 0 5192.93 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=50000.0 ohms, r2=100 ohms, and input voltage 15v. <END_USER_REQUEST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 75304.79 <NL> r2 2 0 47977.16 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=10436 ohms, c=8.85e-07f. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 8.85389-07 <NL> r1 out 0 10436 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a low pass filter circuit with a resistor of 6844.81 and a capacitor of 8.304e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 8679.96 <NL> c1 out 0 6.301-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 1000.0 <NL> c1 out 0 1-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 87175.55 <NL> r2 2 0 52297.01 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 86031.49 <NL> r2 2 0 27167.07 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a voltage divider circuit using r1=20009.67 and r2=25568.39. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 20009.67 <NL> r2 2 0 25568.39 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=13546 ohms, c=2.22e-07f. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 2.21599-07 <NL> r1 out 0 13546 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=40326 ohms, c=7.09e-07f. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.09477-07 <NL> r1 out 0 40326 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a voltage divider circuit using r1=43252.55 and r2=66243.5. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 12789.17 <NL> r2 2 0 31437.06 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with r1=1406 ohms and r2=4936 ohms. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> xop 0 fb out opamp <NL> r1 fb 0 1406 <NL> r2 out fb 4936 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 1-10 <NL> r1 out 0 100000.0 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> help me with a spice netlist for a resistor ladder with 2 stages. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> opamp amplifier with gain 12. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> xop in fb out opamp <NL> rin fb 0 1000.0 <NL> rf out fb 11000.0 <NL> vpos 15 0 dc 15 <NL> vneg 0 -15 dc -15 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .subckt opamp 1 2 3 <NL> e1 3 0 1 2 15 <NL> .ends <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 8.534-07 <NL> r1 out 0 2298.17 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 40492.84 <NL> r2 2 0 43486.25 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 60812.08 <NL> r2 2 0 629.78 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please help me generate a voltage divider circuit with 13895.17 resistor and 71280.13 resistor. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 68556.58 <NL> r2 2 0 29323.19 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=200 ohms, r2=10000.0 ohms, and input voltage 10v. <END_USER_REQUEST>

<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 8671.33 <NL> c1 2 0 6.47-07 <NL> r2 2 3 2449.0 <NL> c2 3 0 9.142-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> run an .ac analysis and list v(node) magnitude and angle for several frequencies. <END_USER_REQUEST>

<NETLIST> vac 9 0 ac 10 <NL> r1 1 x2 22000 <NL> r2 x2 8 1000 <NL> r3 8 0 3300 <NL> vsense 5 6 0 <NL> hdep x2 2 vsense 0.1 <NL> .ac lin 11 10 1000.0 <NL> .end <END_NETLIST>

<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter with r=1500.0 ohms, c=1e-12f, cutoff frequency approximately 106103295.39hz. <END_USER_REQUEST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 7. <END_USER_REQUEST>

<USER_REQUEST> generate a spice netlist for an active high-pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 sin(0 1 1000) ; input sinusoidal waveform <NL> .model opamp opamp (gbw=1e+06) <NL> r1 in n1 10000 <NL> c1 n1 n2 1e-08 <NL> r2 n2 n3 10000 <NL> c2 n3 out 1e-08 <NL> r3 n3 n4 10000 <NL> c3 n4 0 1e-07 <NL> r4 n4 n5 10000 <NL> c4 n5 0 1e-06 <NL> vcc 5 0 dc 15 ; positive supply voltage <NL> vee 0 6 dc -15 ; negative supply voltage <NL> vout out 0 <NL> .ac dec 10 1 1e+06 ; perform an ac analysis from 1 hz to 1 mhz <NL> .print ac v(out) ; print output voltage <NL> .plot ac v(out) ; plot output voltage <NL> .probe <NL> .end <END_NETLIST>

<USER_REQUEST> generate an ngspice netlist for a current divider with a 2.7 current source. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 8.102 <NL> r1 1 0 97764.02 <NL> r2 1 0 61677.55 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a voltage divider with resistors of 26546.88 ohms and 75729.66 ohms. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 26546.88 <NL> r2 2 0 75729.66 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 4. <END_USER_REQUEST>

<USER_REQUEST> create a high pass filter circuit with a resistor of 6224.45 and a capacitor of 9.421e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.267-07 <NL> r1 out 0 6077.56 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a voltage divider circuit using r1=96774.63 and r2=3266.59. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 96774.63 <NL> r2 2 0 3266.59 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 3141.09 <NL> c1 out 0 8.493-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a spice netlist for a current divider with a 1.716 current source and resistors r1=25297.5 and r2=21156.4. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 6.047 <NL> r1 1 0 41341.24 <NL> r2 1 0 86213.05 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> run an .ac analysis and list v(node) magnitude and angle for several frequencies. <END_USER_REQUEST>

<USER_REQUEST> create a 2-stage voltage divider ladder circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a two-stage low pass filter using r1=3952.36, c1=5.138e-07, r2=6740.25, and c2=8.41e-08. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 2303.21 <NL> c1 2 0 2.621-07 <NL> r2 2 3 8255.57 <NL> c2 3 0 5.18-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> perform a linear dc operating point/sweep analysis and compute node voltages and branch currents. <END_USER_REQUEST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 81516.7 <NL> r2 2 0 24160.53 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please create a current divider circuit. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 0.496 <NL> r1 1 0 46110.64 <NL> r2 1 0 41935.86 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a voltage divider circuit with r1=6181 ohms, r2=7209 ohms, and input voltage 18v. <END_USER_REQUEST>

<NETLIST> v1 in 0 dc 18 <NL> r1 in out 6181 <NL> r2 out 0 7209 <NL> .op <NL> .print dc v(out) <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 2.252-07 <NL> r1 out 0 7893.82 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> help me with a spice netlist for a resistor ladder with 5 stages. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> r9 5 6 1000 <NL> r10 6 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> print v(6) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a low pass filter circuit with a resistor of 6137.45 and a capacitor of 1.049e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 8698.25 <NL> c1 out 0 5.29-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a high pass filter circuit with a resistor of 272.04 and a capacitor of 8.324e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 7.276-07 <NL> r1 out 0 2034.12 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a 4-stage voltage divider ladder circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a high pass filter with r=7612.09 ohms and c=4.339e-07 f. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.339-07 <NL> r1 out 0 7612.09 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate an ngspice netlist for an rc low pass filter using r=4405.25 and c=2.779e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 5337.07 <NL> c1 out 0 3.554-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 6.478-07 <NL> r1 out 0 6044.75 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 3.29-07 <NL> r1 out 0 9149.81 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please help me generate a voltage divider circuit with 46920.87 resistor and 8435.45 resistor. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 46920.87 <NL> r2 2 0 8435.45 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 6.519-07 <NL> r1 out 0 1329.42 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.72-07 <NL> r1 out 0 4829.97 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a spice netlist for a 1st-order rc low-pass filter with r=20000.0 ohms, c=1e-07f, cutoff frequency approximately 79.58hz. <END_USER_REQUEST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 10367.65 <NL> r2 2 0 97228.73 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a low pass filter circuit with a resistor of 3065.89 and a capacitor of 1.327e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 3065.89 <NL> c1 out 0 1.327-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=20000.0 ohms, c=5e-06f, cutoff frequency around 1.59hz. <END_USER_REQUEST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 7362.42 <NL> c1 out 0 1.666-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 6392.32 <NL> c1 out 0 5.243-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 3.231-07 <NL> r1 out 0 1565.61 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 8607.41 <NL> c1 2 0 9.295-07 <NL> r2 2 3 4007.5 <NL> c2 3 0 3.951-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a high pass filter circuit with a resistor of 5558.69 and a capacitor of 4.294e-07. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.294-07 <NL> r1 out 0 5558.69 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please create a two-stage low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 6506.21 <NL> c1 2 0 1.615-07 <NL> r2 2 3 4831.41 <NL> c2 3 0 3.003-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a netlist for a 4-stage resistor ladder circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a high pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 5.509-07 <NL> r1 out 0 217.55 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a 5-stage voltage divider ladder circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> compute the dc transfer from input to output node and list resistor currents. <END_USER_REQUEST>

<USER_REQUEST> generate a spice netlist for a rc high-pass filter with r=48405 ohms, c=4.73e-07f. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> c1 in out 4.72951-07 <NL> r1 out 0 48405 <NL> .control <NL> ac dec 10 1 1e+07 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> create a 5-stage voltage divider ladder circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 6925.05 <NL> c1 out 0 6.156-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> help me with a spice netlist for a resistor ladder with 2 stages. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 1000 <NL> r2 2 0 1000 <NL> r3 2 3 1000 <NL> r4 3 0 1000 <NL> r5 3 4 1000 <NL> r6 4 0 1000 <NL> r7 4 5 1000 <NL> r8 5 0 1000 <NL> r9 5 6 1000 <NL> r10 6 0 1000 <NL> .control <NL> op <NL> print v(2) <NL> print v(3) <NL> print v(4) <NL> print v(5) <NL> print v(6) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate an ngspice netlist for a current divider with a 2.537 current source. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 5.634 <NL> r1 1 0 87876.36 <NL> r2 1 0 4887.27 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 79118.47 <NL> r2 2 0 38450.93 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> i need a two-stage low pass filter circuit with these values: r1=9838.38, c1=3.36e-08, r2=4024.43, c2=4.715e-07. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 7718.17 <NL> c1 2 0 1.97-08 <NL> r2 2 3 5847.98 <NL> c2 3 0 8.904-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> i need a two-stage low pass filter circuit with these values: r1=3930.1, c1=2.697e-07, r2=7069.52, c2=5.984e-07. <END_USER_REQUEST>

<NETLIST> v1 1 0 ac 1 <NL> r1 1 2 5657.47 <NL> c1 2 0 5.383-07 <NL> r2 2 3 3510.28 <NL> c2 3 0 3.427-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(3) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a spice netlist for a non-inverting op-amp amplifier with gain 11. <END_USER_REQUEST>

<USER_REQUEST> please create a current divider circuit. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 7.58 <NL> r1 1 0 33974.22 <NL> r2 1 0 84776.84 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 25906.09 <NL> r2 2 0 38634.55 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate an ngspice netlist for a current divider with a 2.77 current source. <END_USER_REQUEST>

<NETLIST> i1 0 1 dc 8.778 <NL> r1 1 0 84697.61 <NL> r2 1 0 2090.53 <NL> .control <NL> op <NL> print i(r1) i(r2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> please generate a voltage divider circuit. <END_USER_REQUEST>

<NETLIST> v1 1 0 dc 10 <NL> r1 1 2 7877.15 <NL> r2 2 0 74380.22 <NL> .control <NL> op <NL> print v(2) <NL> .endc <NL> .end <END_NETLIST>

<USER_REQUEST> generate a low pass filter circuit. <END_USER_REQUEST>

<NETLIST> v1 in 0 ac 1 <NL> r1 in out 6117.41 <NL> c1 out 0 9.578-07 <NL> .control <NL> ac dec 10 1 1e+06 <NL> print ac v(out) <NL> .endc <NL> .end <END_NETLIST>